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Aaron Bauch (Field Application Engineer, IAR Systems)
Location: 107B
Date: Thursday, May 16
Time: 10:15 am - 11:00 am
Track: ESC Boston, Track B: Embedded Software Design & Verification
Vault Recording: TBD
The ARM CoreSight debug macrocell architecture provides a wealth of useful real-time trace data that can be used to visualize and capture events in real time when connected to a professional debug probe and software. This includes real-time delivery of critical variable values, Interrupt entry and exit times, instruction profiling information as well as software triggered events that are timestamped with clock-cycle precise time values.
In addition, most Real Time OS kernels use similar data structures such as Task Control Blocks (TCBs) and task scheduling kernel routines. These will be different at the detail level for different RTOSs but the mechanisms are generally similar.
This session will show you how these two concepts can be leveraged to easily trace task switch activity occurring in your RTOS-based system with cycle-accurate timing. This will enable you to observe interactions between tasks, interrupts, data value changes and even target power consumption all on a common Oscilloscope-like display. The presentation will show how this can be accomplished with three of the most popular RTOS implementations; FreeRTOS from AWS, ThreadX from Express Logic and uC/OS-III from Micrium. The mechanisms provided by each of these products to enable this kind of visibility will be discussed. The techniques employed can be used with other RTOS’s if the TCB structure and kernel task switch routines can be accessed.
Attendees will learn: