Use the scheduling tool below to browse all the available sessions, speakers and topics at this year's event. Find the content and sessions to fit all of your educational needs and ensure you get the most out of your time at the show.
Glenn Steiner (Senior Manager, Xilinx)
Date: Wednesday, April 18
Time: 8:00am - 8:45am
Pass type: Conference (Paid) - Get your pass now!
Conference Track: Advanced Technologies, Embedded Software Design & Verification
Vault Recording: TBD
Audience Level: N/A
For many applications, researchers and now developers are moving to Convolutional Neural Networks (CNN) as the best approach for object detection and identification. Traditionally, CNNs have been implemented in floating point on general-purpose computers. Unfortunately, this does not scale well to embedded processors, which are typically cost and power constrained. The latest implementations of neural networks have moved to integer operations ranging from 32 bits down to 8 bits. However, to accommodate the massive number of operations required for vision recognition at real-time frame rates GPUs, ASICS or FPGAs have been required. FPGAs have the unique ability to be configured for the integer precision required for any given application enabling less table memory, increased performance, and lower power consumption compared to traditional integer implementations on competitive devices. In this session we will examine implementations of a Binary Neural Network (BNN) on an FPGA demonstrating four orders of magnitude greater performance than a software implementation on an embedded processor. And, we will provide a detailed example of a traffic sign recognition system including real-time camera input, sign identification, and recognition.
Co-authors include: Andreas Schuler of Missing Link Electronics and Michaela Blott of Xilinx.
Convolutional Neural Networks (CNN) are becoming the go-to solution for object detection and identification. In this session we will examine implementation of a Binary Neural Network (BNN) for real-time object recognition on an FPGA demonstrating four orders of magnitude greater performance than a software implementation on an embedded processor.